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Dec 11, 2025

The TLB Explained Simply

OSmemoryhardware

With virtual memory, every address your program uses is a virtual address. Before the CPU can actually touch RAM, that address has to be translated into a physical address using the page table.

Here’s the problem: the page table itself lives in memory. So in the naive version, every single memory access would actually require two memory accesses, one to look up the translation in the page table, and one for the data itself. With multi-level page tables (x86-64 uses 4 levels, sometimes 5), it’s even worse: one lookup can mean four or five extra memory accesses.

That would make virtual memory unusably slow. That’s where the TLB comes in.

What Is the TLB?

The TLB (Translation Lookaside Buffer) is a small, very fast cache inside the CPU that stores recent virtual-to-physical translations.

  • On a memory access, the CPU first checks the TLB.
  • TLB hit: the translation is right there, almost free (it’s done in parallel with the cache lookup).
  • TLB miss: the CPU has to walk the page table in memory, then stores the result in the TLB for next time.

A typical TLB only holds a few hundred to a few thousand entries, but thanks to locality that’s enough to get hit rates above 99% for most programs.

Why Context Switches Hurt

The TLB caches translations for the current process. When the OS switches to another process, those translations are no longer valid, same virtual addresses, completely different physical pages.

Two classic solutions:

  1. Flush the TLB on every context switch. Simple, but the new process starts with a cold TLB and eats a bunch of misses.
  2. ASIDs (Address Space Identifiers): each TLB entry is tagged with the process it belongs to, so entries from multiple processes can coexist and nothing needs to be flushed.

Modern CPUs use the ASID approach (Intel calls them PCIDs).

Huge Pages

One TLB entry normally covers a 4 KB page. If your program uses gigabytes of memory, that’s a lot of entries competing for a tiny cache.

Huge pages (2 MB or 1 GB on x86-64) let one TLB entry cover much more memory, which massively reduces TLB misses. This is why databases like PostgreSQL and the JVM have settings for huge pages, for big heaps it’s a real, measurable win.

References

  • Silberschatz, A., Galvin, P. B., & Gagne, G. Operating System Concepts (10th ed.). John Wiley & Sons, 2018.